Principal Compiler Engineer

Company: Siemens Technology-To-Business Center
Job Location: US-CA-Berkeley

Required Skills:
IR and backend optimizations, VLIW/DSP/loop optimizations, integrated scheduling and register allocation for clustered register file architectures, power optimization, Unix/C++/Python

Description:
Siemens TTB seeks an experienced Compiler Engineer to develop a GCC/LLVM based backend for an advanced embedded VLIW processor. This is a challenging position in a startup environment where the successful candidate will lay down the foundations for the compiler infrastructure that will form a critical part of a new product. Success in this crucial task will lead to the candidate becoming the de-facto lead of software for a start-up company and therefore requires substantial effort and dedication upfront.

Main responsibilities will be to rapidly produce a VLIW backend as well as assist with complex systems programming tasks. For this position, C++/assembly language wizardry will be taken for granted, experience with simulators is required, and familiarity with EDA design flows is a plus.

What will set the successful candidate apart from the crowd will be breadth of knowledge, familiarity with Python, Pyrex and Swig bindings and the ability to solve challenging problems independently. MS/PhD or 5+ years of relevant experience required.

Local (East Bay) candidates preferred. Applicant must live/relocate within commuting distance of our office in Berkeley, CA.



To Apply
For immediate consideration, send resume to: compiler_engr@ttb.siemens.com
Principals only!!